In the process of manufacturing or inspecting an LSIC, a wafer may go through multiple processing stages by different systems. Typically, a first step of the processing stages is to perform wafer alignment on those systems.
FIG. 1 illustrates a diagram of a traditional system 100 for wafer alignment in the manufacture or inspection of an LSIC. System 100 may include a motion stage 102, an industrial camera 104, and a lighting source 106. Camera 104 may acquire images of sites of interest on a wafer placed on motion stage 102, e.g., a patterned wafer 112. System 100 may also include a robot (not shown), a pre-aligner (not shown), and a chuck (not shown) on top of the motion stage 102. The chuck, also known as a wafer adaptor, is located on top of motion stage 102 to hold wafer 112. The chuck may provide vacuum or electrostatic force to tightly hold wafer 112. System 100 may additionally include a host computer (not shown) for image acquisition, algorithm computation, image display, result display, user input, etc.
During the manufacture or inspection process, the robot takes wafer 112 from a wafer cassette (not shown), and places wafer 112 on the pre-aligner (not shown). The pre-aligner roughly determines orientation of wafer 112 according to a notch or a short straight/flat edge 114 in wafer 112. For example, almost all wafers of 300-mm diameter have a notch on their edges, and some wafers of 200-mm diameter have a short straight/flat edge. Such a notch, or straight/flat edge roughly indicates the orientation of the wafer defined by the boundaries of dice printed on the wafer periodically. The robot then transports wafer 112 onto motion stage 102. Motion stage 102 may move in a horizontal plane, also known as an X-Y plane (X and Y directions shown in FIG. 1), and rotate with respect to its center. Motion stage 102 may also move along a vertical (Z) direction (also shown in FIG. 1).
When system 100 performs work on wafer 112, orientation of wafer 112 relative to motion stage 102 is generally important. For example, for a wafer inspection system, a thin-film (TF) measurement system, an optical critical dimension (OCD) measurement system, or a scanning electron microscope (SEM) system (e.g., CD-SEM system), a laser or an electron beam may be used to scan an area in a die on wafer 112 to acquire an image of the area, and the image may have a pixel size of tens of nanometers or even several nanometers. Because the field of view (FOV) of camera 104 is relatively small, if wafer 112 is not well aligned, it is difficult to accurately locate a site of interest on wafer 112 at a nanometer or sub-nanometer scale.
The surface of wafer 112 typically contains a plurality of repeated rectangular modules 116, also known as dice. Ideally, the dice are identical in function and design on a given wafer. However, in reality, some dice on a given wafer may be slightly different than others due to processing condition drift. Each die is surrounded by horizontal and perpendicular carved border lines, and contains integrated circuitry therein, which may be a logical unit such as a central processing unit (CPU) or a memory unit. Between two adjacent dice, there is generally a fixed distance, e.g., 10 microns, in the horizontal direction, i.e., the X direction, and in the perpendicular direction, i.e., the Y direction. An area formed between the dice is known as a street. Boundaries of the dice and internal patterns of the dice generally include dominant horizontal and perpendicular lines, which determine the orientation of the wafer as a whole. When system 100 performs work on wafer 112, system 100 aligns wafer 112 with motion stage 102. More particularly, system 100 may measure a skew angle between wafer 112 and motion stage 102, and then rotate motion stage 102 to align it with wafer 112 within a predefined error range.
FIG. 2 shows a top view 200 of wafer 112 to be aligned with a motion stage, such as motion stage 102 shown in FIG. 1, based on a traditional method. Referring to FIG. 2, similar to the above description of FIG. 1, the robot takes wafer 112 out of the cassette and places it onto the pre-aligner. The pre-aligner may roughly determine the orientation of wafer 112 according to notch 114 in wafer 112. The robot may then place wafer 112 onto the motion stage, whose orientation may be represented by the X and Y axes shown in FIG. 2, for alignment. As a result of this pre-alignment, a skew angle 202 between wafer 112 and the motion stage may be limited within a relatively small range, e.g., 0.2 degree, and the center of wafer 112 may be close to the center of the motion stage within a certain distance. FIG. 2 shows skew angle 202 and a FOV 204 of the camera 104 (shown in FIG. 1).
After the pre-alignment, alignment may be performed by measuring skew angle 202 between wafer 112 and the motion stage, i.e., the orientation of wafer 112 relative to the motion stage. Skew angle 202 may then be corrected by rotating the motion stage with respect to its center. For different systems or applications, requirements for wafer alignment accuracy may differ. For example, skew angle 202 may need to be corrected within 0.0001 degree for certain systems.
Traditionally, in order to determine the orientation of a wafer relative to the motion stage, a user may select first and second images of two similar sites, respectively, located along a die row, approximately in a line but far away from each other on the wafer. The first and second selected images may contain rich characteristic patterns of, e.g., horizontal and perpendicular edges or corners on different die. The greater the distance is between the two sites, the smaller the relative error is in measuring the skew angle between the wafer and the motion stage. Taking into account the error in placement of the wafer center in wafer loading and the skew angle, initially selecting two sites near the wafer center is generally preferred. After successfully performing image pattern matching at the initial two sites, additional sites with a greater distance from each other may be used to acquire subsequent images, and the skew angle may be determined by the initial two sites, two far sites in opposite direction, or the additional sites using line fitting methods, e.g., a least square line fitting method. Traditionally, image pattern matching methods may be used to determine locations of the sites based on which the skew angle may be determined.
Based on image pattern matching methods, a sub-image, also known as a region of interest (ROI), including a pattern in the first selected image, may be preprocessed and verified for its quality including uniqueness within the image, i.e., within the field of view of the camera. The first selected image is referred to herein as a model image, also known as a template image or a kernel image, and the pattern is referred to herein as a model pattern, also known as a template pattern or a kernel pattern. The model pattern may then be used to search for a matching pattern, referred to herein as a target pattern, in the second selected image, referred to herein as a target image, with sub-pixel accuracy. Normally, the user determines the two sites and performs a wafer alignment for a wafer, and saves the model image, the site locations, and the sub-image including the model pattern in a file called a recipe. This process is called a recipe creation process. A subsequent process, i.e., the recipe execution process, is the actual working process, where the robot places pre-aligned wafers onto the motion stage, one at a time, and the motion stage automatically moves so that the camera may acquire wafer images at the site locations saved in the recipe. The model pattern saved in the recipe may further be used to perform pattern matching on the acquired images, to determine accurate site locations on the wafer where the images are acquired. In this way, locations of two similar sites on the wafer and, hence, a slope of the line passing the two sites, may be determined. Therefore the orientation of the wafer may also be determined. In recipe execution, there is no user interaction, i.e., the process is automatic. One recipe can be used for many wafers of the same type and for the same process. In addition, to determine displacement between two images, pattern matching may also include determining a relatively small rotation and scaling between a model image and a target image.
Wafer images may be acquired by the camera using a variety of imaging techniques, such as a charge-coupled device (CCD) based imaging technique, a complementary metal-oxide-semiconductor (CMOS) based imaging technique, an X-ray imaging technique, or an electron-beam or ion-beam imaging technique, such as a scanning electron microscopy (SEM) or focused ion beam (FIB) microscopy imaging technique. For different formats of images, different image pattern matching methods may be used. For example, for gray-scale images, a normalized cross-correlation (NCC) algorithm may be used. Also, for example, other algorithms such as a Boolean “AND” operation may be used for binary images. Further, for example, a Hausdorff Distance method may be used for binary images after edge detection.
Traditionally, matching results are typically normalized to values between 0 and 1, inclusive, where 0 corresponds to a minimum similarity value (indicating that a target pattern does not match a model pattern), and 1 corresponds to a maximum similarity value (indicating that a target pattern exactly matches a model pattern). When the matching result between a target pattern and a model pattern reaches a threshold value, which is normally empirically predetermined, such as 0.7, the target pattern and the model pattern may be considered matching. When a target pattern in a target image matches a model pattern in a model image, the relative geometric relationship between the target pattern and the model pattern may be considered as the relative geometric relationship between the target image and the model image, which is necessary when the distance of the two imaging sites on wafer are known (can easily be obtained from the stage coordinate at the two sites).
In reality, however, image degradation factors exist, such as drift of a lithography system in the lithography process performed on wafers, including exposure time and focus drift, drift of the overall imaging system from its optimal condition, system noise, illumination changes, wafer surface damage, local image distortion, and wafer material and thin-film structure variations. These degradation factors may cause poor pattern matching and result in wafer alignment failure. The cost for such failure may be high, especially when the system is an online system being used to manufacture wafers.
A possible method to solve the above issue is to use multiple model patterns in a model image for pattern matching in order. For example, the user may select multiple model patterns in the model image, and the host computer searches a target image to identify a target pattern matching a first one of the multiple model patterns. If a target pattern matching the first model pattern cannot be identified, e.g., a similarity value between any target pattern in the target image and the first model pattern is smaller than a predetermined threshold value, the host computer may search the target image to identify a target pattern matching a second one of the multiple model patterns. This process may repeat, until the host computer identifies a target pattern in the target image matching a model pattern in the model image. A relative geometric relationship between that target pattern and that model pattern may then be used to determine the relative geometric relationship between the target image and the model image. If all of the similarity values for the multiple model patterns are smaller than the predetermined threshold value, the image pattern matching is considered to fail. Since this method uses multiple model patterns one at a time, the predetermined threshold value may need to be relatively high to achieve good performance. Therefore, when wafer image quality is not sufficiently good, alignment performance may be degraded.